$5.$ An SRAM with $12$ address pins and $8$ data pins would have:A$.$B$.$C$.$a$)$ an organization of $12$K $/8$ bits.D$.$b$)$ approximately $163/4$ M locations.HID $11.$c$)$ an organization of $12$K x $8$ bits.a$)$d$)$ a storage capacity of $32768$ bits.