6. [15pts) Analyze the function of the circuit in Figure 4, Write the full Verilog code for the circuit using the signals in Table 1. Parallel tot 0:4 Shiload Serial input PPTP Fundam R.COM P lecture 681.5OKA Clock W Parallel Figure 4 Table 1 signal definition Direction Name Clock Shift Load Width 1 input input 1 Remark Clock signal When 0.shift w into the circuit when I Load the datain into the circuit Serial input data Parallel output Parallel input w 1 Q datain input output input [0:3] (0:3)