6.- (a) Mention two differences between the address bus and the data bus of a computer system in terms of the direction information can flow in them and the meaning of the information each carries (b) A microprocessor system has an address bus with 20 lines, Aig-Ao, and a data bus with 16 lines, Dis-Do. What is the memory space of the system (in KByte and MByte)? Justify Indicate the address range of the entire memory space providing the lowest and highest addresses in hexadecimal (c) Provide the 16-bit CPU in the figure below with a 512KByte memory space by making use of 64K x 16 memory chips like the ones provided in the figure below i. How many chips are needed? Fill in the blanks beside and inside the memory chips with the appropriate numbers. The number on top of this symbolrepresents the number of lines on that bus. The spaces besides the A's and the D's indicate which set of lines of the address or data bus is connected to each chip, respectively ii. Complete the connections in the figure below adding logic gates where needed to produce the chip select (CS) signals needed (the decoding logic). Explain the reasons for the connections made; include expressions for the Boolean logic used. i. Provide the address range allocated to cach chip in hexadecimal. Note: R/W & clock signals are omitted for simplicity 20 Address Bus (A19-Ao) 64K x 16 64K x 16 64K x 16 D -D D -D D -D 16-bit CPU A -A 64K x 16 64K x 16 64K x 16 D -D D -D D -D 16 Data Bus (DIS-Do) 6.- (a) Mention two differences between the address bus and the data bus of a computer system in terms of the direction information can flow in them and the meaning of the information each carries (b) A microprocessor system has an address bus with 20 lines, Aig-Ao, and a data bus with 16 lines, Dis-Do. What is the memory space of the system (in KByte and MByte)? Justify Indicate the address range of the entire memory space providing the lowest and highest addresses in hexadecimal (c) Provide the 16-bit CPU in the figure below with a 512KByte memory space by making use of 64K x 16 memory chips like the ones provided in the figure below i. How many chips are needed? Fill in the blanks beside and inside the memory chips with the appropriate numbers. The number on top of this symbolrepresents the number of lines on that bus. The spaces besides the A's and the D's indicate which set of lines of the address or data bus is connected to each chip, respectively ii. Complete the connections in the figure below adding logic gates where needed to produce the chip select (CS) signals needed (the decoding logic). Explain the reasons for the connections made; include expressions for the Boolean logic used. i. Provide the address range allocated to cach chip in hexadecimal. Note: R/W & clock signals are omitted for simplicity 20 Address Bus (A19-Ao) 64K x 16 64K x 16 64K x 16 D -D D -D D -D 16-bit CPU A -A 64K x 16 64K x 16 64K x 16 D -D D -D D -D 16 Data Bus (DIS-Do)
