6. For The Following Circuit Clock CLR' (A) Ignore The CLR' Input. Find A State Diagram And A State Table (B) Assume The Flip Flops Are Initially In State 0 (And There Is No CLR') Complete The Timing Trace Of The Flip-Flops As Far As Possible For This Input Sequence: X 1 0 1 1 1 0 (C) For The Following Inputs (Both X And CLR), Complete The Timing Diagram For

 

6. For the following Circuit D 91 D 92 Clock CLR' (a) Ignore the CLR' input. Find a state diagram and a state table (b) Assume the Flip Flops are initially in state 0 (and there is no CLR') complete the timing trace of the Flip-Flops as far as possible for this input sequence: X 1 0 1 1 1 0 (c) For the following inputs (both x and CLR), complete the timing diagram for the state of each flip flop Clock CLR' ep