6.10 Given the SR flip-flop of Fig. P6.10a, complete the timing diagram of Fig. P6.10b by determining the waveform of the output Q. Note that the flip-flop is triggered on the positive edge of the clock signal. The condition S = R = 1 is produced twice by the inputs. Will this lead to unstable operation? Explain. S Clock PC P Clock X2 X2 R - e (a) Figure P6.10 (a) Flip-flop. (b) Timing diagram. (b)