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7. 8 Points) Assume we have a computer where the CP 1 when all memory accesses hit in cache. Only load and store access the
7. 8 Points) Assume we have a computer where the CP 1 when all memory accesses hit in cache. Only load and store access the data cache, and these total 20% of instructions. If the cache miss rate is 2% and the miss penalty is 25 cycles, how faster would the computer be if all instructions were cache hits
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