$(9)$ The percentage of memory accesses that are found in the cache memory is the

$q,$

A$)$ cache miss

C$)$ miss ratio

D$)$ cache hit

of hit ratio

$(10)$ When using the $q,$ technique, all memory write operations are made to both main memory and cache.

A$)$ write back

C$)$ unified cache

B$)$ Write through

D$)$ LRU

$(11)$ Which of the following instructions is used for procedure call?

A$)$ jr

C$)$ jal

a$)1$

D$)$ return

$(12)$ Which of the following instructions sets the least significant four bits in register $$t1$ and leaves remaining bits unchanged?

A$)$ ori $St1,St1,0\mathrm{.}0000FFFF$

C$)$ andi $St1,St1,00000000F$

Af ori $5t1,5t1,0\mathrm{.}0000000F$

D$)$ andi St$1,$ St$1,0$x$0000$FFFF

$(13)$ In a plpelined datapath, what does the $5^{th}$ stage of executing $s$ s $$2,0($$$a1)$ do$?$

A$)$ Write to register

C$]$ Write to memory

B$)$ Decode instruction

D$)$ No action

$(14)$ Assume the instruction "add $$a1,$$$a2,$$$a{3}^{\text{'}\text{'}}$ is followed by ${?}^2$ sub $$=4,$$$a1,$$$a{2}^{\text{'}\text{'}}$ on a pipelined procesvor. What is the type of hazard in this case?

A$)$ Data hazard

C$)$ Structural hazard

B$)$ Control hazard

D$)$ No hazard

$(15)$ The ALU control uses inputs from both ALUOp and function field in the case of

A$)$ Iw instruction

C$]$ R$-$Type instruction

B$)$ beq instruction

D$)$ all of the previous

$(16)$ During executing which of the following instructions does ALU perform a subtraction operation?

A$)$ beq $$s2,$$$+-5,$ Exit

C$)5W552,20(515)$

B$)lw$$$52,12($$t$5).$

D$)$ all of the previous

$2$