A $10MHz$ MC$68008$ based system is to run at full speed using $2$ wait cycles when accessing

the ROM. The range of ROM access time that can be used if the address strobe latency is $60$

ns and the data read setup time is $20ns$ using $2-$stage decoding circuit with $10ns$ per stage

a$.200$ to $300ns$

b$.300$ to $400ns$

c$.310$ to $410ns$

d$.320$ to $420ns$

$-2z=1=-4yy1|r$