A B The figure below shows two types of MUX: 0-3 0-3 Y 0-3 S (a) 2 4-bit input MUX A B C D S (b) 10 1 3. Y 2 41-bit input MUX Consider an R-type instruction. When the CPU is fetching two operands: rs1 and rs2 out of 32 registers and each operand is 32-bit wide, what type(s) of MUX(S) should be used? How many bits for the switch S of each MUX? What is the width of the inputs and outputs? Please draft out the logic gate(s) circuit and explain how your circuit works to get the operands.