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A baseline microprocessor is enhanced as follows 1. The core is replicated 16 times to form a 16 way CMP 2. A floating point co-processor

A baseline microprocessor is enhanced as follows

1. The core is replicated 16 times to form a 16 way CMP

2. A floating point co-processor is added to each core.This co-processor speeds up all floating point co-processor in each core by a factor of 4 and is attached

to the core.While the floating point co-processor is active, the host core is idle and the presence of the co-processor does not affect instructions that are not part of floating point operations.

We observe the following on the new machine.

1. The floating point co-processor is used during 30% of the execution time of each core.

2. Only one core is active 25% of the time, and the four cores are active 75% of the time.

What is the speed up of the new machine compared with that of the base machine

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