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A circuit has four inputs RSTU and four outputs VWYZ. RSTU represents a binary coded-decimal digit. VW represents the quotient and YZ the remainder when

A circuit has four inputs RSTU and four outputs VWYZ. RSTU represents a binary coded-decimal digit. VW represents the quotient and YZ the remainder when RSTU is divided by 3 (VW and YZ represent 2-bit binary numbers). Assume that invalid inputs do not occur. Realize the circuit using:

A ROM.

A minimum two-level NAND-gate circuit.

A PLA (specify the PLA table).

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