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A computer system has a L 1 Data Cache, L 2 Data Cache, and Main Memory unit connected as shown in the diagram. For a

A computer system has a L1 Data Cache, L2 Data Cache, and Main Memory unit connected as shown in
the diagram. For a Program the Data hit rate in L1 and L2 Data Cache is H1 and H2 respectively (both H1, H2
are specified as a percentage). The time to access the data in L and L2 Data Cache is T1 and T2 ns
respectively. The time to Access the Main Memory is T3 ns.
Note: The time to access L2 Data cache T2 includes the time to L1 Data Cache. So the time to access L2 should
not be assumed as T1+ T2 ns. Similarly the time to access Main Memory is T3 ns and should not be assumed T1
+T2+T3ns
H1=80
H2=40
T1=10
T2=30
T3=100
The average Data Access time in ns is
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