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A computer's processor sends 32 bit addresses to the cache controller. It has a 512 KByte, 8-way set associative, write back data cache with
A computer's processor sends 32 bit addresses to the cache controller. It has a 512 KByte, 8-way set associative, write back data cache with block size of 32 Bytes. In addition to the address tag, each cache tag directory entry contains 3 valid bits and 1 modified bit. Find the size of the cache tag directory. a) 212 Kbits b) 320 Kbits c) 160 Kbits d) 120 Kbits
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Computer Organization and Design The Hardware Software Interface
Authors: David A. Patterson, John L. Hennessy
5th edition
124077269, 978-0124077263
