A DRAM must operate with a minimum refresh time of $4ms.$ The storage capacitor in

each cell has a capacitance of $50fF$ and is fully charged at $5V.$ Estimate the worst$-$case

leakage current that the dynamic capacitor node can tolerate $($i$.$e$.,$ the charge in the capac$-$

itor has dropped to its $50\%$ level$).$