a) i. Draw the finite state machine representing the design given below. ii. Specify the function of the circuit D D Q DFF1 DFFO 0 CLK CLK M b) For a state machine that detects a sequence of 0110 and that asserts a logical 1 at the output during the last state of the sequence i. Draw the Moore FSM diagram Draw the Mealy FSM diagram iiiDraw the ASM chart for the mealy FSM