. A multistage amplifier is shown in Fig. Q2. You may assume that the body and the source terminals of the NMOS and PMOS are connected together, i.e. no body effect for NMOS and PMOS. You may also assume the following device parameters and all NMOS and PMOS devices are identical: Kq=2mA/V2, VTHN=1V, A=0.001V?, Cgd=0.5pF, C,=5pF Kp=2mA/V2, JVTHP=1V, 1p=0.001V', Cgd=0.5pF, Cg=5pF Note Kn = 0.54nCox6%), Kp = 0.5Mp Cox 6). (a) Design Rref so that the drain currents for M1, M2 and M3 are 500uA. (b) Determine the Rin and Rout of the amplifier. (c) Design R so that the overall gain is 6. . W W 5V 5V 5V M3 Rout RREF V2 MA VB 5V M2A Ms C M2 V3 Vout V4 10uF M1B R1 RL 200002 M1 10002 RS Cs 10u V1 Vs Rin