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a) Using real CPU architecture, write and explain the fetch/execute cycle of ADD instruction. b)Figure 2.1 shows 32-bit instruction format. Based on figure, how many.
a) Using real CPU architecture, write and explain the fetch/execute cycle of ADD instruction.
b)Figure 2.1 shows 32-bit instruction format. Based on figure, how many.
1- Instructions we can create?
2- Memory locations we can address?
c) Figure 2.2 below shows the architecture of individual memory cell. Based on this figure, explain how data is transferred between the MDR and memory cell.
10101010 | 101010101010101010101010 bit O 7 8 31 op code Address field Figure 2.1: 32-bit instruction format 10101010 | 101010101010101010101010 bit O 7 8 31 op code Address field Figure 2.1: 32-bit instruction format
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