Abstractly, a switch has some input ports and some output ports. When a packet arrives an input port, it is forwarded to the correct output port for outbound transmission. A switch typically has memory buffers for queueing packets that are waiting to be forwarded or transmitted. In one type of switch, called input queueing switch, the memory buffers exist only at the input side. A queue is called FIFO, if the packets leave the queue in the order they arrived. The figure below depicts a simple input queueing switch with a FIFO queue at each input port. The small numbered boxes inside the FIFO queues denote packets destined for the corresponding numbered output port. Assume that the switch operates in a time-slotted fashion and only one packed can be transmitted over one wireline transmission path (denoted by dash line) in one time slot. The two solid lines show an example of two transmissions in one time slot. Note that at most one packet can be transferred from an input port to an output port during one time slot.

a.This simple input queueing switch design is known to achieve very poor utilization. That is the output ports are often not kept busy transmitting as much as possible. Explain why you think this design has such a low utilization problem.

b.How would you change the design of the input side of the switch to reach higher utilization? A critical objective here is that the switch should have certain freedom to select any packet in an input queue to transfer. Drawing your design may help with your explanation.

Input ports Output ports input queue 1 11212 input queue 2 213131 . THEI@c..".k.. input queue 3