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ADD R6, R6, R6AND R3, R3, R0LSR R0, R0, R11MOV R0, #(0x25 + (0x34 < < 2))SUB R10, R10, R9LSR R0, R0, R11ARM instruction sheets

ADD R6, R6, R6AND R3, R3, R0LSR R0, R0, R11MOV R0, #(0x25 + (0x34 << 2))SUB R10, R10, R9LSR R0, R0, R11ARM instruction sheets Solve for the correct CPU computationsand actions. Execute t \begin{tabular}{|c|c|c|} \hline \( \begin{array}{l}\text { Memory } \\ \text { Address }\end{array} \) & \( \begin{array}{l}\text { Orig. } \\ \text { Data }\end{array} \) & \( \begin{array}{l}\text { 1 answer

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