ADDI X9 X6 8

ADD X10 X6 XZR

STUR X10 [X9, 0]

LDUR X9, [ X9,0]

ADD X0, X9, X10

For each LEGv8 instruction in Exercise 2.9 (copied below), show the value of the opcode (Op), source register (Rn), and target register (Rd or Rt) fields. For the I-type instructions, show the value of the immediate field, and for the R-type instructions, show the value of the second source register (Rm).