Answered step by step
Verified Expert Solution
Link Copied!

Question

1 Approved Answer

an engine to be G(s)=(s+0.5)(s+1)1 design a control system to regulate the output of the engine such that - the settling time is less than

image text in transcribed

an engine to be G(s)=(s+0.5)(s+1)1 design a control system to regulate the output of the engine such that - the settling time is less than 2 seconds, - the maximum overshoot is less than 20%, and - the maximum steady-state error is less than 2% of the commanded output. 4. Design a PI controller GPI(s)=Kp+sKi to improve the steady-state error of the closed-loop system, if needed. Note that the PI controller is a lag controller since it adds negative phase-shift to the Bode phase plot of the loop transfer function. Hint: Instead of a pure integrator, implement s+ps+z, where p0.01. Use the FVT to compute the zero location by satisfying the steady-state error requirement. The FVT yields e=1+GPI(s)GPD(s)G(s)1s=0 Pure integrators are not recommended in real systems since a pure integrator's output diverges if a constant nonzero input (usually bias) is applied to the integrator. 5. Simulate the closed-loop system with the designed controller. Does your design satisfy the time-domain specifications? Note that the designed controller is the product of the PD and the PI controller that you designed in the previous two steps. an engine to be G(s)=(s+0.5)(s+1)1 design a control system to regulate the output of the engine such that - the settling time is less than 2 seconds, - the maximum overshoot is less than 20%, and - the maximum steady-state error is less than 2% of the commanded output. 4. Design a PI controller GPI(s)=Kp+sKi to improve the steady-state error of the closed-loop system, if needed. Note that the PI controller is a lag controller since it adds negative phase-shift to the Bode phase plot of the loop transfer function. Hint: Instead of a pure integrator, implement s+ps+z, where p0.01. Use the FVT to compute the zero location by satisfying the steady-state error requirement. The FVT yields e=1+GPI(s)GPD(s)G(s)1s=0 Pure integrators are not recommended in real systems since a pure integrator's output diverges if a constant nonzero input (usually bias) is applied to the integrator. 5. Simulate the closed-loop system with the designed controller. Does your design satisfy the time-domain specifications? Note that the designed controller is the product of the PD and the PI controller that you designed in the previous two steps

Step by Step Solution

There are 3 Steps involved in it

Step: 1

blur-text-image

Get Instant Access to Expert-Tailored Solutions

See step-by-step solutions with expert insights and AI powered tools for academic success

Step: 2

blur-text-image

Step: 3

blur-text-image

Ace Your Homework with AI

Get the answers you need in no time with our AI-driven, step-by-step assistance

Get Started

Recommended Textbook for

Auditing

Authors: Alan H. Millichamp

8th Edition

082645500X, 9780826455000

More Books

Students also viewed these Accounting questions

Question

In Exercise 40 what is the

Answered: 1 week ago

Question

onclick is equivalent to which two events?

Answered: 1 week ago

Question

2 What can organisations do to improve employee utilisation?

Answered: 1 week ago

Question

4 When is it a good idea to use the external supply of labour?

Answered: 1 week ago

Question

3. What would you do now if you were Mel Fisher?

Answered: 1 week ago