An instruction pipeline consists of 4 stages: Fetch (F), Decode field (D), Execute (E), and ResultWrite (W). The five instructions (I1-15) in a certain instruction sequence need these stages for the different number of clock cycles as shown by the table below. a. Find the number of clock cycles needed to perform the 5 instructions. b. How many clock cycles are required to complete the following loop? For (i=1 to 2){11;12;13;14;15}