Answer question a below 1 #loop 2 data 3 .text 3 4 4 5 li $11,0X11 #initialise is register with 0x17 6 li $t2,0x15 #inttiaise 2nd and 4th register with Ox 15 7 li $13,0 finitialise 3rd with O li $14,0x15 9 10 st$t1,$t1,$t3 #compare istand 3rd register, if (Ist register Set ist register 11 xori $t1,$t1,5 #xorth register with Ox5 12 bnc $12,$24,loop #compare and and 4th register if (2nd register I= 4th register loop 13 seps: Figure 1: Program A Table 1: Control signals for Pipelined Processor Reg Instruction Dst R-Type 1 lw 0 SW X bea X I-type 1 ALU Op 1 1 0 0 0 0 ALU 0 0 0 0 1 1 ALU Mem Mem Reg Mem Src Branch Read Write write to Reg 0 0 0 0 0 1 0 1 0 1 0 0 1 1 1 0 0 1 0 X 0 1 0 0 0 0 0 0 1 1 X FCS IDEX EXWER Curso NEMPAT wal IED - Still Branch ALU RM Iela 1 RAS Red CALA 1 veya TORTEN memory RM >ALI Acid CO 2 1 ca ro We Address Tu HIKIRI data LAY DAN 15-01 - 39 Roland ALU Manded Iranasan AUD Iron 115 11 al Figure 2: Pipelined Processor Instruction-time diagram- C7 C8 C9 C10 C11 C12 C13 C14 | c2 | c | c4 IF ID EX MEM li li IF EX ID IF I C5 C6 WB MEM WB EX MEM ID EX IF ID li ID IF WB MEM li WB sit MEM EX ID WB MEM IF EX WB xor bne sit IF EX ID IF MEM EX ID WB MEM WB EX MEMWB ID EX MEM xor IF ID IF bne a. Copy Figure 2 (right-click ->Copy Image) to Jamboard/Paint or any image editing software. Using the image editing software, (assuming there is no hazard) draw the datapath and write the control values for Cycle 7. Draw the datapath using the Yellow Highlighter, and write ALL the control values using Blue Pen or sticky notes. Please remember to label (using sticky notes) by writing the instruction at its respective stage. Then submit your answer in a PDF file