Assistance would be greatly appreciated

1) (Based on C.1 of the book, Page C-71) [6pts] Use the following code fragment: Loop: |x9, 0(x2) |x4, x9,x9 |x10.0(x1) add $10,x10, x4 sd *10.0(x1) 12, x2, 4 sub x5, x2, x3 S, Loop I b nez 1b. Show the timing of this instruction sequence for the 5-stage RISC pipeline with full forwarding and bypassing hardware. Use a pipeline timing chart like that shown in Figure C.8. Assume that the branch is handled by predicting it as not taken. If all memory references take l cycle, how many cycles does this loop take to execute? Id x9, 0(x2) FDXM