Assume a system has a TLB hit ratio of 95%. It requires 18 nanoseconds to access the TLB and 80 nanoseconds to access main memory. What is the effective memory access time in nanoseconds with a single level page table for this system? Question 3 6 pts Assume the following information of the *two levels paging virtual address translation. - The page size for a virtual memory system is 4KB - the frame size for a physical memory system is 4KB - The number of bits in a virtual memory address is 32 . For a given virtual memory address 0x1234ABCD, 1. What is the index value into the page directory table? Leave the answer in hex. 2. What is the index value into the page table? Leave the answer in hex