Assume that a byte addressable RAM is used and given the fact, as stated above, answer the following questions: a. If each instruction is 1 Byte, how the program counter will be updated? b. If each instruction is 2 Bytes, how the program counter will be updated? c. If each instruction is 4 Bytes, how the program counter will be updated? d. If each instruction is 8 Bytes, how the program counter will be updated?

2. Assume that a byte addressable RAM is used and machine codes of an instruction set are of variable lengths, i.e., from 1 byte to 8 bytes, how would be keep/maintain sequence of instruction in a CPU, explain in detail with suitable diagrams and design procedure.

3. Assume that a processor has following specifications: 8 register: size of each register is 8 bits 8 register: size of each register is 16 bits An ALU that can perform 4 basic arithmetic operations (addition, subtraction, division and multiplication) and 4 basic logical operations (AND, OR, NOT and Ex-OR) Maximum capacity of ALU: process two 16 bits operands at a time A single bus architecture is used inside the CPU to connect all functional units The size of data bus is 8 bits The size of address bus is 16 bits a. Draw the internal block diagram of the CPU. b. What is the maximum size of RAM (byte-addressable) can be used with the CPU? c. Name the registers and assign binary codes for all (please note that you intend to release advanced version shortly and intend to make the new one backward compatible as well) d. List the arithmetic and logical operations and assign mnemonic for all (a very short word used to indicate an arithmetic or logical operation) e. Assign binary codes for all instructions (please note that you intend to release advanced version shortly and intend to make the new one backward compatible as well) f. Show the general formats of Instructions in low level language g. Form the complete Instruction set for the CPU (in low level language) h. Show/form machine codes of at least 2 arithmetic and 2 logical instructions i. List some micro-operations, in general, required to transfer contents of a register to another register. j. Show its interfacing with the RAM