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cache system we have the following attributen. 2 ta of noo +245 Gasse 3Caofboes128Maof3256KaofQ.52144BofCachedata200000BofCacheinsuruction64Bpercacheline a) Determine number of lines in cache. b) Determine the number

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cache system we have the following attributen. 2 ta of noo +245 Gasse 3Caofboes128Maof3256KaofQ.52144BofCachedata200000BofCacheinsuruction64Bpercacheline a) Determine number of lines in cache. b) Determine the number of address bits out of the proceswor. c) Determine the number of bits needed for the block affset section of the address. d) If our cache is 8-way set associative, how many sets are there in the cache? e) How many bits are needed to select sets in this cache? f) Determine the number of bits of the tag, if 4 -way set associative cache is implemented. a) Fill the table below with proper number of bits in each portion of the address bit map for tulity h) Assume the CPU has put the following address on the address bus: IC A F EDEC AT CI the bits and identify the meaning of each segment of the address based on your answ cache system we have the following attributen. 2 ta of noo +245 Gasse 3Caofboes128Maof3256KaofQ.52144BofCachedata200000BofCacheinsuruction64Bpercacheline a) Determine number of lines in cache. b) Determine the number of address bits out of the proceswor. c) Determine the number of bits needed for the block affset section of the address. d) If our cache is 8-way set associative, how many sets are there in the cache? e) How many bits are needed to select sets in this cache? f) Determine the number of bits of the tag, if 4 -way set associative cache is implemented. a) Fill the table below with proper number of bits in each portion of the address bit map for tulity h) Assume the CPU has put the following address on the address bus: IC A F EDEC AT CI the bits and identify the meaning of each segment of the address based on your answ

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