Can you write verilog hdl file according to the information given below? I tried but it didn't work.

Final Project: 16-bit MIPS Single Cycle In this assignment you will design a 16-bit MIPS processor. It is same as the 32bit MIPS but the register contents are 16 bits and there are 16 registers. Therefore, each register address is 4-bit. I uype 1. Each instruction is 32-bits. 2. As you have 16 bits of register contents. You can implement a li \$rt, imm instruction which can directly load a 16-bit number into \$rt. Implementation of li is a MUST. 3. A word is 16-bits for that MIPS. 4. The Data Memory will hold 216 words of data therefore jump instructions can directly give the word address with 16-bits. 5. There will be no byte access therefore do not implement lb, sb instructions. 6. Instruction Memory holds 1024 instructions, each of which is 32bits. Therefore a PC of 10-bits is enough. Or you can use the least significant 10 bits of PC. 7. You will verify the design using a Verilog testbench and simulation. Write a small assembler so that you can convert instructions to machine code. This is needed for simulations