comp architecture. Can you do a and b please.

(22 pts) A block diagram of single-cycle MIPS architecture is given below. Add Add ALU result 4 Shift left 2 RegDst Branch MemRead MemtoRe Instruction 131-26 Control MemWrite ALUSrc RegWrite Instruction 25-2 Read PCRead register 1 Read address nstruction [20-16 Read data 1 Zero ALU ALU result Instruction register 2 Read Instructionnstruction (1register data2 31-0) M Write Read Address data 0 memory Write data Registers Write Data data memo 16 Sign- extend Instruction [15-0 32 ALU control Instruction [5-0]