computer archicture

(a) Assume that a hypothetical computer contains a single data register, called an accumulator (A). Both instructions and data are 8 bits long. Memory is byte addressable. Instruction format provides 3 bits for the opcode and remaining bits for the memory direct address. Integer data uses 2's complement method. Partial list of assembly instructions includes the following: Opcode Operand Machine Code Meaning LDA Direct Memory 000 Load the data from memory to address accumulator STA Direct memory 001 Store the data from accumulator to address memory ADD Direct memory 010 Add the memory contents to address accumulator and store the result in accumulator This hypothetical computer uses program counter to keep track of program execution and instruction register for holding the instructions temporarily before decoding. Answer the following: i) Identify the instruction format. ii) Identify the range of direct memory addresses. iii) Write the program fragment to add the contents of memory word at address 15 to the contents of memory word at address 16 and store the result in memory location, 16. Assume that program is stored starting from memory address 5. iv) Illustrate the fetch and execute cycles for the instructions written in (iii)