Computer Systems Design Problem:
The opcode is always six bits. All data operands are eight bytes (that is, 64 bits). All memory addresses are eighteen bits, using direct addressing. (That is, an 18-bit field in the machine code is a direct pointer to a data memory with 28 bytes.) In the data memory, assume A is at address Ox1E500, B is at Ox1E508, C is at O1E510, and D is at Ox1E518. Each architecture uses a fixed length instruction set (that is, every instruction used by that architecture has the same integer number of bytes). Question 1. Machine code for the four instruction set architectures (a) How many bytes are needed for each instruction for the accumulator architecture? Show how you would arrange the fields for the instructions STORE A and MUL D. Show the resulting machine code for these instructions in hexadecimal, assuming STORE has the opcode Ox01 and MUL has the opcode Ox03. (b) How many bytes are needed for each instruction for the stack architecture? Show how you would arrange the fields for the instructions PUSH A and MUL. Show the resulting machine code for these instructions in hexadecimal, assuming PUSH has the opcode Ox00 and ADD has the opcode Ox02. (c) How many bytes are needed for each instruction for the two-address load-store architecture? Assume it has 32 working registers in the register file. Show how you would arrange the fields for the instructions STORE A, R1 and MUL R2, R1. Show the resulting machine code for these instructions in hexadecimal, assuming STORE has the opcode Ox01 and MUL has the opcode . (d) How many bytes are needed for each instruction for the three-address memory-memory architecture? Show how you would arrange the fields for the instruction ADD A, A, D. Show the resulting machine code for this instructions in hexadecimal, assuming ADD has the opcode 02. The opcode is always six bits. All data operands are eight bytes (that is, 64 bits). All memory addresses are eighteen bits, using direct addressing. (That is, an 18-bit field in the machine code is a direct pointer to a data memory with 28 bytes.) In the data memory, assume A is at address Ox1E500, B is at Ox1E508, C is at O1E510, and D is at Ox1E518. Each architecture uses a fixed length instruction set (that is, every instruction used by that architecture has the same integer number of bytes). Question 1. Machine code for the four instruction set architectures (a) How many bytes are needed for each instruction for the accumulator architecture? Show how you would arrange the fields for the instructions STORE A and MUL D. Show the resulting machine code for these instructions in hexadecimal, assuming STORE has the opcode Ox01 and MUL has the opcode Ox03. (b) How many bytes are needed for each instruction for the stack architecture? Show how you would arrange the fields for the instructions PUSH A and MUL. Show the resulting machine code for these instructions in hexadecimal, assuming PUSH has the opcode Ox00 and ADD has the opcode Ox02. (c) How many bytes are needed for each instruction for the two-address load-store architecture? Assume it has 32 working registers in the register file. Show how you would arrange the fields for the instructions STORE A, R1 and MUL R2, R1. Show the resulting machine code for these instructions in hexadecimal, assuming STORE has the opcode Ox01 and MUL has the opcode . (d) How many bytes are needed for each instruction for the three-address memory-memory architecture? Show how you would arrange the fields for the instruction ADD A, A, D. Show the resulting machine code for this instructions in hexadecimal, assuming ADD has the opcode 02
