Configure the cache coherence protocol using the following configurations: MSI, MESI, and DRAGON. For each of the configurations, obtain the global miss rate for the system using the memory traces: FFT, Simple, Speech and WeatherConfigure the cache coherence protocol using the following configurations: MSI, MESI, and DRAGON. For each of the configurations, obtain the global miss rate for the system using the memory traces: FFT, Simple, Speech and Weather

Do all the protocols have the same miss rate? Which is the coherence protocol with the best miss rate? And which does it have the worst? In particular, is the miss rate the same for the MSI and MESI protocols? Why?

Do you observe any difference between the update-based protocol and the invalidation based protocols? Which? Why? Are the coherence misses the same for these two kinds of protocols?

Do you think that the results and conclusions obtained with these experiments are of general application or they may change depending on the used benchmarks?

In conclusion, does the use of a concrete cache coherence protocol improve the multiprocessor system performance? Why?