Consider a byte$-$addressable memory hierarchy with $44-$bit addresses. The

memory hierarchy adopts a $4-$way set associative cache of $64$ KB$,$ with every

block in a set containing $64$ bytes. Which of the following statements are

correct?

$($a$)$ Among an address of $44$ bits, the least$-$significant $6$ bits is the "offset."

$($b$)$ Among an address of $44$ bits, the most$-$significant $30$ bits is the "tag."

$($c$)$ The total number of bits required to store the entire cache $($including

valid bits, tags, and data$)$ is $(1+30+64\backslash$times $4\backslash$times $8)\backslash$times $28=532,224($bits$).$

$($d$)$ By increasing the block size while using the same storage size for data,

the total number of bits required to store the entire cache will decrease.

$($e$)$ Given the following sequence of access addresses: $(0$E$1$B$01$AA$050)16,$

$(0$E$1$B$01$AA$073)16,(0$E$1$B$2$FE$3057)16,(0$E$1$B$4$FFD$85$F$)16,$

$(0$E$1$B$01$AA$04$E$)16,$ assuming that the cache is initially empty, there will be

one set containing three filled block at the end of the sequence.