Consider a memory hierachy with two cache levels L1 and L2, L1 with a miss rate of 9% and L2 with a miss rate of 2% and an access time of 8 clock cycles. The main memory has an access time of 49 clock cycles. Assume that 24% of the instructions are loads and stores. The execution CPI is 1.0. Compute the value for the CPI taking into account the memory stall cycles