Consider the amplifier given in Figure 2A below. The circuit has parameter defined as: UnCox = 120A/V, HpCox = = 40A/V, Vtp = -0.8V, Vtn = 0.9V, L = 2Lmin = 1m for all transistors, An (1um) = Ap (1um) = 0.1V, Vov = 0.3V for all transistors, CL = 5pF, Cgs1 = Cgs2 = Cgs3 = 0.1pF Assume Vout VDD/2 Current mirror is a 1:1 ratio. IBIAS=50UA ~ Q3 A VDD 5.0V Vin Tor 1:1 current ratio Q1 Vout Q2 FIGURE 2A CL a) What is the DC voltage at node A of Figure 2A? b) What are the widths of transistors Q2 and Q3 in Figure 2A? c) Draw the low-frequency small signal model of the circuit in Figure 2A. In order to reduce the number of transistors within your small signal model, you may use the equivalent output resistance of the current mirror in lieu of the current mirror transistors. Include channel length modulation. d) Derive and numerically solve for the low-frequency small signal voltage gain (Av=Vout/Vin) of the circuit in Figure 2A. Use the small signal model that you have created in part c. e) Considering the circuit in Figure 2A, we can simplify our frequency response analysis by evaluating the current mirror as a stand-alone circuit. Therefore, draw the high-frequency small signal model of only the current mirror (consisting of transistors Q2 and Q3). Include only gate-to-source capacitances and ignore all other capacitance. f) Using node-pole association, how many poles exist in the current mirror circuit of part a? Mark/Label "pole" on all of the nodes that create poles on your small signal model of part a. g) What is/are the approximate numerical value/s of this/these pole/s?