Consider the design of two logic circuits that both have four inputs: A, B, C and D; and one output: X. Each circuit is implemented using 4-input AND gates (with negated inputs) and each circuit has an OR gate to generate the output. - For circuit 1,X is defined to be 1 if and only if interpreting ABCD as an unsigned binary integer results in an odd number. Note A is the most significant bit, then B, and so on. - For circuit 2,X is defined to be 1 if and only if the total number of 1 's among A,B,C and D is even. Which of the following 4-input gates would be used in the implementation of both circuits? Consider the design of two logic circuits that both have four inputs: A, B, C and D; and one output: X. Each circuit is implemented using 4-input AND gates (with negated inputs) and each circuit has an OR gate to generate the output. - For circuit 1,X is defined to be 1 if and only if interpreting ABCD as an unsigned binary integer results in an odd number. Note A is the most significant bit, then B, and so on. - For circuit 2,X is defined to be 1 if and only if the total number of 1 's among A,B,C and D is even. Which of the following 4-input gates would be used in the implementation of both circuits