Consider the hardware shown in Figure 1 consisting of a 4-bit D-type register, two 2-1 multi- plexers, and a 4-bit parallel adder (with one of the adder inputs connected to the constant value of 0001) 5 d in mick 0s -bit registe out cloc 0001 eith Figure 1: Two muxes, a register, and an adder. (a) Complete the following table which explains the functionality of the given hardware: Table 1: Functional Description of hardware in Figure 1 keith out present) q_out(next clock) g out .out q.out .out mick 0 same q out 0 (b) Explain in words the functionality of this circuit. Express your answer in a manner similar to: This hardware organization is a 4-bit register capable of being loaded at the next rising clock edge with the two's complement of the value presently stored within the register when the signal keith . 1, and muck V', or the register may be cleared to "O000" when keith-V' and mick- Of course, the hardware performs something completely different. The above is given merely as an example of how you should express your answer. (c) Complete the timing diagram given on the last page of this exam. You may remove the last page and insert it into your answer booklet. WRITE YOUR NAME AND ID NUMBER IN THE SPACE PROVIDED ON THE LAST PAGE. You may assume 0 delay for the 4 -bit reg- ister. Indicate the value stored in the 4-bit register (gout) between the lines labelled START and END Consider the hardware shown in Figure 1 consisting of a 4-bit D-type register, two 2-1 multi- plexers, and a 4-bit parallel adder (with one of the adder inputs connected to the constant value of 0001) 5 d in mick 0s -bit registe out cloc 0001 eith Figure 1: Two muxes, a register, and an adder. (a) Complete the following table which explains the functionality of the given hardware: Table 1: Functional Description of hardware in Figure 1 keith out present) q_out(next clock) g out .out q.out .out mick 0 same q out 0 (b) Explain in words the functionality of this circuit. Express your answer in a manner similar to: This hardware organization is a 4-bit register capable of being loaded at the next rising clock edge with the two's complement of the value presently stored within the register when the signal keith . 1, and muck V', or the register may be cleared to "O000" when keith-V' and mick- Of course, the hardware performs something completely different. The above is given merely as an example of how you should express your answer. (c) Complete the timing diagram given on the last page of this exam. You may remove the last page and insert it into your answer booklet. WRITE YOUR NAME AND ID NUMBER IN THE SPACE PROVIDED ON THE LAST PAGE. You may assume 0 delay for the 4 -bit reg- ister. Indicate the value stored in the 4-bit register (gout) between the lines labelled START and END