Consider the use of caches in multicore systems. a) Given is the following program sequence that is executed by two processors P1 and P2. Each processor has its own cache into which the variable A can be loaded. The MSI protocol is used to keep the caches of the two processors coherent. Both caches are empty at the beginning and A = 0. Piread A P1 write A, 1 P2 read A P1 read A P2 write A, 2 P2 read A Pi write A, 3 Provide the following information about each memory access to the variable A after each instruc- tion of the program sequence. The MSI-States in the caches of both processors. The values of the variable in the caches of both processors. The value of the variable in main memory. The processor actions (PrWr, PrRd) caused by the access, and The bus operations (BusRd, BusRdEx, flush) caused by the MSI protocol.