Control signals for STI instruction

Write the full set of datapath control signals necessary to implement an STI instruction from fetch through execution. Use the state numbers in Patt and Patel's FSM diagram to identify each state $($for example, the first fetch state is #$18,$ and the decode state is #$32).$

Make sure the datapath control signals are in the same order as the table shown below or you will lose points

note: please determine the number of columns needed based on the instruction $($not based on the figure below$)$

$\backslash$table$[[,,,,,,,],[$LD$.$BEN,,,,,,,$],[$LD$.$MAR,,,,,,,$],[$LD$.$MDR$,,,,,,,],[$LD$.$IR$,,,,,,,],[$LD$.$PC$,,,,,,,],[$LD$.$REG,,,,,,,$],[$LD$.$CC$,,,,,,,],[$GateMARMuX$,,,,,,,],[$GateMDR$,,,,,,,],[$GateALU$,,,,,,,],[$GatePC$,,,,,,,],[$MARMUX$,,,,,,,],[$PCMUX$,,,,,,,],[$ADDR$1$MUX,,,,,,,$],[$ADDR$2$MUX,,,,,,,$],[$DRMUX$,,,,,,,],[$SR$1$MUX,,,,,,,$],[$ALUK$,,,,,,,],[$MIO$.$EN$,,,,,,,],[$R$.$W$,,,,,,,]]$

Control signals for $BR$ instruction