D CMP_SCI 2700_Homework 2.pdf (page 2 of 6) excitation table field-programmable g combinational circuit lex PLD (CPLD) FPGA) fip-flop ripple counter sequential circuit product of sums (POS) programmable array logic shift register PAL) (PLA) (PLD) simple PLD (SPLD) gh map lock table exer logic array sum of products (SO synchronous counter S-R Latch truth table Quine-McCluskey method XOR gate programmable logic device read-only memory (ROM) Problems Construct a truth table for the following Boolean expressions a. ABC ABC b. ABC +ABC+ABC c. A(BC BC) d. (A + BA CA +B) 1