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Design a 4-bit divide-by-11 binary UP-counter with a 9.091% (1/11th) duty-cycle output. Provide the design equations for each flip-flop input and draw the completed circuit.
Design a 4-bit divide-by-11 binary UP-counter with a 9.091% (1/11th) duty-cycle output. Provide the design equations for each flip-flop input and draw the completed circuit. All unused counter states should go to count 8 to ensure the counter always starts up properly
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