Design a circuit that does one of the two listed operations in the table below and indicates whether the result is valid or not. If SEL=0 then A, B, and VAL are treated as unsigned numbers; if SEL=1 then A, B, and VAL are treated as signed numbers. The valid output thus depends on SEL. Draw a lower-level BBD (the higher-level BBD is provided) Minimize hardware Consider valid a positive logic signal Use only foundation modules, gates, magnitude generator, 2's complement, and validity modules. You can use a validity check and a magnitude generator in your circuit without defining it MY_CKT 12 A + 12 AVAL 12 B + valid SEL valid valid = 1; indicates valid result SEL VAL A+B (inputs interpreted as unsigned 0 binary) A - B (inputs interpreted as signed 1 binary in RC format) valid = 1; indicates valid result Design a circuit that does one of the two listed operations in the table below and indicates whether the result is valid or not. If SEL=0 then A, B, and VAL are treated as unsigned numbers; if SEL=1 then A, B, and VAL are treated as signed numbers. The valid output thus depends on SEL. Draw a lower-level BBD (the higher-level BBD is provided) Minimize hardware Consider valid a positive logic signal Use only foundation modules, gates, magnitude generator, 2's complement, and validity modules. You can use a validity check and a magnitude generator in your circuit without defining it MY_CKT 12 A + 12 AVAL 12 B + valid SEL valid valid = 1; indicates valid result SEL VAL A+B (inputs interpreted as unsigned 0 binary) A - B (inputs interpreted as signed 1 binary in RC format) valid = 1; indicates valid result