Design a Mealy FSM that will detect the sequence "10101" or "10111" (either/or) with overlap in both cases. The output (Y) should be a '1' when either sequence has been detected. The next state after the detection of a sequence will be the state that contains the overlap for BOTH sequences (hint: the overlap that is common between the two sequences is "1"). Use SR flip-flops for state memory. If any state encodings are not used, set the next state to Reset (SO) and outputs to 0. Use the minimum number of bits needed for the state encodings. Show the inputs and outputs, list the states and show state encodings, show state transition diagram, show state transition table, and extract next-state equations (S and R equations) and output equations. Use K-maps to extract the simplest equations. Show the hardware implementation (circuit schematic) using your equations and SR flip-flops.