Design of a pseudo random number (PRN) generator with Seven Segments displays

Write a VHDL Code

You will design a random number generator that can generate different 8-bit number sequences. The initial conditions are loaded on reset (initial starting count). If start is set to 1 the then the pseudo random generator generates a random sequence and when start signal is set to zero it stops and holds on to the last value in the sequence and display it on 2 seven segment displays.

Design and implement the PRG using the polynomial P(x) = 1 + x² + x³ + x⁴ + x⁸. Verify via simulation the operation using different seeds (initial conditions). Use both the modular and standard (LFSR Fibonacci).