digital logic design

5 00 10 120 Consider the gively state transition diagram of a synchronous sequential circuit a) Form the corresponding state transition table for this diagram. b) Reduce the number of the states to minimum, showing all intermediate steps clearly. Do near optimal state assignments. [Solve this question on a white paper, write your name on the paper, and upload the solution as a picture or pdf file using the upload button below] (Non-anonymous question o) (20 Points)