Direct memory access is used for high-speed I/O devices in order to avoid increasing

the CPUs execution load.

a) How does the CPU interface with the device to coordinate the transfer?

b) How does the CPU know when the memory operations are complete?

c) The CPU is allowed to execute other programs while the DMA controller

is transferring data. Does this process interfere with the execution of the

user programs? If so, describe what forms of interference are caused.