do question no d

3. a) Consider a cache memory of size 4KB and block size having 4 words (1 word = 4 bytes). Determine the miss rate if the following bytes are addressed sequentially. 1, 2, 10, 4097, 4098, 15 b) If we change the block size in Q3(a) to 8 words, find out the miss rate for similar memory address access. Find out the miss rate. c) Compare the miss rate in Q3(a) & Q3(b) and explain the principle of locality. d) If the block size in 16 words then find the actual size of the cache in unit of bit