E G M U Problem 3: Write some VHDL code that implements the 8 to 1 Multiplexer shown below. Use a selective statement in your architecture. The CE input is a chip enable. 00 Data in t 8: 1 Mux F 3 SEL CE IMG_0090 (1) MO_0090 jpeg 2021-01-11-raspiso G Search or type URL