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ECE4375-001/D01 Microprocessor Architecture Project 1 NOTE: Submit the completed project folder by the due date specified on blackboard. The project name must follow this format:

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ECE4375-001/D01 Microprocessor Architecture Project 1 NOTE: Submit the completed project folder by the due date specified on blackboard. The project name must follow this format: fistlast-Project1.zip Develop a vending machine controller in Verilog and a testbench to validate its operation. The controller will have three inputs. Each of these three inputs will indicate to the controller what coins are being inserted (name them: inquarter, indime, innickle). One input will signal that a quarter was inserted by toggling from the default "low" state to high (active high) for a duration of one clock cycle. The other two inputs will do the same but for dimes and nickels. The vending machine controller will also have three additional inputs that are used to indicate the beverage selected by the user (name them: inbev1, inbev2, inbev3). These inputs will be active high for a duration of one clock cycle. The beverage costs will be $1.00,$1.20, and $1.15 for bev1, bev2, and bev 3 respectively. The vending machine controller must have three outputs to indicate to the change dispenser how much change it needs to provide. Similar to the coin input logic, the vending machine controller must provide a sequence of active high pulses to the change dispenser indicating what coins must be released (name them: outquarter, outdime, outnickle). The vending machine controller must have three additional outputs used to dispense one of the three beverages selected if enough coins were inserted into the machine (name them: outbev1, outbev2, outbev3). These outputs must also be active high for a duration of one clock cycle

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