Please answer the following questions, based on the resistor, inductor, capacitor (RLC) circuit with voltage source (V) indicated below: (a) Assuming an AC voltage source, is the reactance of the capacitor C minimized at high or low frequency and why? (b) Assuming an AC voltage source, what would be required to minimize the impedance of this circuit and why? (c) Assuming a DC voltage source, what is the difference in current at points i, ii, and iii as a function of time? (d) Assuming a DC voltage source, write out the sum of the voltage drops around the circuit. V ii R